Posts
The Flawed Design of Intel TDX
Lanzaboote: Towards Secure Boot for NixOS
IOAPIC Mysteries: IRQ Pin Assertion Register
Intel MPX, CET, SGX, WTF
OS Development with RISC-V and ULX3S
Complexity in Operating Systems
RISC-V Stumbling Blocks
1001 Ways of Implementing a System Call
Hiding Data in Redundant Instruction Encodings
Fingerprinting x86 CPUs using Illegal Opcodes
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