Posts
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Quick and Dirty Website Change Monitoring
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FOSDEM Edition: Thoughts on the Microkernels
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Hardening C Against ROP: Getting CET Shadow Stacks Working
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Immutable Systems: Cross-Compiling for RISC-V using Nix Flakes
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Immutable Systems: NixOS + systemd-repart + systemd-sysupdate
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Confidential Computing: Complexity vs Security
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RISC-V: The (Almost) Unused Bit in JALR
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Split Lock Detection VM Hangs
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Intel TDX Doesn't Protect You from the Cloud
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The Flawed Design of Intel TDX
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Lanzaboote: Towards Secure Boot for NixOS
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IOAPIC Mysteries: IRQ Pin Assertion Register
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Intel MPX, CET, SGX, WTF
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OS Development with RISC-V and ULX3S
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Complexity in Operating Systems
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RISC-V Stumbling Blocks
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1001 Ways of Implementing a System Call
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Hiding Data in Redundant Instruction Encodings
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Fingerprinting x86 CPUs using Illegal Opcodes
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